CPU Architect

2 days ago


Hod HaSharon Center District, Israel Ethosia Full time ₪120,000 - ₪180,000 per year


• Invents corresponding HW features and SW solutions to address above challenges. Evaluates feasibility tradeoffs, explores, and defines new approaches and novel architectures for CPU. Develops the end-to-end architecture of new instructions (when applicable) in coordination with partners. Drives the inclusion of the feature in a CPU project working with micro-architects, designers and verification experts. (the HW/SW features are typically in the form of new instructions or of other Instruction Set constructs and belong to one of following domains: dense compute, general purpose accelerations, use case specific accelerations, system level instructions, Security related technologies, or instrumentation instructions.


• Models CPU functionality, performance and power in simulators, analyzes the bottlenecks of current CPUs on workloads that reflect CPU future usage.


• Provides experimental/proof of concept changes for proposing design alternatives meeting performance, power, area, and timing constraints.


• Reviews and influences cross functional roadmaps.


• Collaborates with SW and HW architects, design, verification, and validation engineers during the execution of the project. Finds mitigations for issues that arise during implementation of his/her features

Requirements


• BSc or higher degree in Computer Science/Engineering or related discipline from a leading university. (alternatively, exceptional proven track record in similar tasks)


• 5+ years experience in one or more of following disciplines : definition of CPU Architectural features, HW/SW co-design (or SW defined HW), Low level performance profiling and optimization of SW with exposure to CPU ISA, Architecture verification, definition of HW/SW security technologies


• Fluent spoken and written English


• Behavioral skills: Team player. Although this is not for a manger position, we require interpersonal skills needed to lead partners and colleagues towards achieving a technical goal


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