Design Verification CAD Engineer
1 week ago
As a CAD DV engineer you will leverage strong SW skills and HW verification knowledge to create diverse solutions for DV activities.
Your work will be used globally throughout all verification teams across the organization, and will contribute to development of all Apple Silicon chips.
Description
In this role you will be contributing to development of tools and methodologies and integrating LLM based capabilities in multiple realms related to Design Verification, collaborating with a wide range of stakeholders at Apple.
Minimum Qualifications
BSc/ MSc in Electrical Engineering, Computer Engineering or Computer Science
3+ years of experience in the HW industry
Strong software foundation - data structures, algorithms, efficiency, version control (git)
Design Verification experience, including: familiarity with simulators (such as VCS, Xcelium), coverage, waveform debug, automations on top of vendor tools
Python, including popular libraries such as Pandas, NumPy, asyncio, FastAPI, Pytest
Adapts quickly to new technologies and methodologies
Independent, self-directed, and autonomous
Preferred Qualifications
Containerization (e.g. Docker)
CI/CD methodologies (e.g., in GitLab/GitHub)
Deploying on Kubernetes, writing Kubernetes/Kustomize YAMLs
Experience with Frontend/Backend/Full-Stack web development
Familiarity with databases - Relational/Non-relational, CAP Theorem
Async programming
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