Verification Engineer

3 days ago

Center District, Israel abra Full time

abra R&D is seeking for a Verification Engineer.
We are looking for a skilled
Block-Level Verification Engineer
with 4 years of experience to join our team.

The role involves developing spec-based verification environments, including building and maintaining simulation setups, writing tests, and conducting functional verification processes.

A full-time hybrid position, based in central of Israel.

Key Responsibilities:

  • Analyze functional specifications and translate them into a complete verification plan.
  • Develop and build verification environments using SystemVerilog/UVM.
  • Write testbenches and automated tests.
  • Perform simulation result analysis, debugging, and bug fixing.
  • Work with coverage metrics (functional and code coverage) to ensure full test coverage.
  • Collaborate closely with design teams to identify and resolve issues.

Requirements:

  • B.Sc. in Electrical/Computer Engineering or a related field.
  • 4 years of hands-on verification experience in ASIC/SoC environments.
  • Proficiency in System Verilog and UVM methodologies.
  • Experience with simulation tools (e.g., Verdi, Questa, VCS).
  • Strong ability to understand complex specifications and convert them into verification environments.

Nice to have:

  • Knowledge of communication protocols (e.g., AMBA/AXI/AHB, PCIe, Ethernet).
  • Experience writing scripts in Python, Perl, Tcl.
  • Familiarity with configuration and bug tracking tools (e.g., Git, Jira).

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