Backend team lead

16 hours ago


Ramat Gan, Tel Aviv, Israel Retym Full time ₪120,000 - ₪180,000 per year

We're seeking an experienced Backend Design Manager to spearhead our backend efforts at an exciting, well-backed startup.

This is a hands-on leadership role where you'll ramp up the complete RTL-to-GDSII flow, build and lead a high-caliber local team, and collaborate with external vendors to ensure successful delivery and tape-outs

Key Responsibilities:

  • Drive and own the backend development flow from RTL to GDSII.
  • Build and manage a local backend design team.
  • Work closely with company various sites.
  • Collaborate with external vendors to scale resources as needed.
  • Establish and execute project plans and schedules.
  • Deliver high-quality, production-ready designs and manage successful tape-outs.

Minimum Qualifications:

  • 10+ years of hands-on experience in backend (physical) design.
  • Proven expertise across the full RTL2GDSII flow, including:
  • Cutting edge technology experience, 5nm and below.
  • Logic synthesis and formal equivalence checking
  • Constraint definition and timing constraints writing
  • Complex IP integration and SoC assembly
  • DFT integration and methodology
  • Floor planning and power-ground mesh planning
  • Place and Route (P&R)
  • Low power design techniques (definition, implementation, and verification)
  • Static Timing Analysis (STA)
  • IR-drop analysis and power integrity
  • Tape-out processes and closing
  • Project scheduling and execution tracking
  • BS/MS in Electrical or Computer Engineering from a leading institution.

Preferred Qualifications:

  • Strong team building and leadership skills
  • Excellent communication and collaboration abilities
  • Demonstrated ability to work with third-party vendors
  • Experience with Synopsys and/or Cadence toolchains
  • Deep understanding of low-power design methodologies
  • Knowledge of clock mesh / multi-source CTS
  • Experience in hierarchical design flows
  • Familiarity with reading and interpreting RTL code
  • Experience with memory compilers and automated block generators

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